3D TCAD Simulation for CMOS Nanoeletronic Devices by Yung-Chun Wu & Yi-Ruei Jhan

Author:Yung-Chun Wu & Yi-Ruei Jhan
Language: eng
Format: epub
Publisher: Springer Singapore, Singapore

© Springer Nature Singapore Pte Ltd. 2018

Yung-Chun Wu and Yi-Ruei Jhan3D TCAD Simulation for CMOS Nanoeletronic Devices10.1007/978-981-10-3066-6_4

4. Inverter and SRAM of FinFET with L g = 15 nm Simulation

Yung-Chun Wu1 and Yi-Ruei Jhan1

(1)Department of Engineering and System Science, National Tsing Hua University, Hsinchu, Taiwan

Yung-Chun Wu

Email: [email protected]

The fundamental of transistors of the circuits can be simulated by using L g = 15 nm FinFET CMOS Inverter and static random-access memory (SRAM). They will consume small amounts of power, and they are equipped with important characteristics of regenerating or cleaning up digital signals. Such FinFET CMOS Inverter basic characteristics will discuss in details in Sect. 4.1, and the speed of Inverter will discuss in Sect. 4.2. SRAM only requires the same transistors and fabrication processes of the basic CMOS technology. It is therefore the easiest to integrate or embed into COMS circuits. The SRAM simulation based on L g = 15 nm FinFET will be discussed in Sect. 4.6 [1–3].

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